From: Richard W.M. Jones <rjones@redhat.com>
Date: Wed, 12 Jun 2019 17:39:28 +0000 (+0100)
Subject: Update 2019 RISC-V talk.
X-Git-Url: http://git.annexia.org/?p=riscv-talks.git;a=commitdiff_plain;h=51948499cde63d234066281881d86a1e327cb2ac

Update 2019 RISC-V talk.
---

diff --git a/2019-redhat/2019-riscv-talk.txt b/2019-redhat/2019-riscv-talk.txt
index 3fae7cf..9bb1824 100644
--- a/2019-redhat/2019-riscv-talk.txt
+++ b/2019-redhat/2019-riscv-talk.txt
@@ -222,24 +222,85 @@ like Fedora on any other architecture]
 [SLIDE: DEBIAN]
 
 While we were working on Fedora, we were also working closely with the
-Debian and upstream communities.  Changes and tips are shared with
-upstream and with Debian.
+Debian and upstream communities.  Patches and techniques are shared
+with upstream and with Debian.
+
+To get involved with Fedora RISC-V please join us on Freenode:
+
+ #fedora-riscv
 
 
 
 3. Companies making RISC-V hardware
 ----------------------------------------------------------------------
 
+Initial RISC-V implementations were small-run silicon or FPGAs.  It
+wasn't until 2018 that we started to see companies producing RISC-V
+processors and boards.  It seems that most companies at the moment are
+looking at the embedded space, and are doing this in order to save on
+ARM licensing fees.  It's still very early days.
+
+Note that embedded processors (RV32) will *not* run Fedora or Debian,
+and some won't even run Linux.
 
+[SLIDE: SIFIVE]
 
+The RISC-V single board computer you can buy today is made by SiFive,
+and it's called the *HiFive Unleashed*.  I have two of these, and we
+have 4 or 5 in total across Red Hat.
 
+This uses the Rocket chip design, with 4 cores.  It's mostly open
+source.  SiFive also have a 32 bit embedded single board computer.
 
+[SLIDE: OTHERS]
+
+ * SHAKTI
+ * Andes N25 and NX25
+ * Kendryte
+ * Codasip
+ * Syntacore
+ * Nvidia
+ * Western Digital
+ * lowRISC
+ * PULPino
+ * Esperanto
+ * Adapteva
 
 
 
 4. RISC-V on the Server
 ----------------------------------------------------------------------
 
+[This section will be a more free-form discussion about servers and
+whether RISC-V will ever capture any significant share of the
+marketplace.  Here I just outline topics for discussion.]
+
+* What is a server?  What is the difference between a server and a
+  laptop?  What specialized components go into a server?
+
+    - NUMA and interrupt routing
+    - headless remote management and BMC
+    - very high speed network interfaces, RDMA
+    - separation of storage from compute, SANs, iSCSI, FC
+    - GPGPU, TPU, custom hardware
+    - hardware offload and accelerators
+    - virtualization, NFV, SR-IOV, ...
+    - fencing
+
+* How is server hardware deployed?  Single servers versus datacenters.
+
+* How is server software provisioned?
+
+    - mass provisioning of nodes (eg. with Ironic)
+    - orchestration and configuration management
+
+* Single kernel image works everywhere.
+
+* Standard boot method.
 
+* Hardware discovery.
 
+* Reliability
 
+    - distributed computing, fast fail-over, containers, etc.
+    - mainframe-style redundancy